This invention relates to a Binary Coded Decimal (BCD) memories and incrementing circuits.
Memories and incrementing circuits are, of course, well known in the prior art. Such devices have, for the most part, been either pure binary incrementing circuits or have been BCD incrementing circuits with several bits of delay associated with the incrementing circuit. It was therefore one object of this invention to provide a BCD incrementing circuit to be used with a BCD memory in which the incrementing circuit had a small amount of delay associated therewith.
It is another object of this invention that the incrementing circuit automatically perform a binary coded decimal correction upon digits of data being outputted from a memory. It is another object of this invention that the incrementing circuit be implementable with MOS FET transistors and have an amount of delay equivalent to 1/2 stage of a shift register.
The foregoing objects are achieved as is now described. A memory, and preferably a shift register is provided with an output. Sampling means are coupled to the shift register at a point whereby the most significant bit of a binary coded decimal digit is outputted therefrom when the least significant bit of the same binary coded decimal digit is being outputted from the output of the memory. An adder circuit is provided for adding one to the least significant bit of the binary coded decimal digit outputted from the memory in response to a control signal and for adding one to the other bits outputted from the memory in response to a carry condition occurring in the adder circuit during the preceding bit of the same binary coded decimal digit and in response to a decimal carry signal. The decimal carry signal is generated by a detector circuit, which is also effective for disabling the adder circuit. The detector circuit is responsive to the sampling circuit, the output of the shift and said control signal for disabling the adder circuit whenever the binary coded decimal digit being outputted from the memory is equivalent to a decimal nine and the control signal is present.